(a) Field of the Invention
The present invention relates to contact structures of wirings and methods for manufacturing the same, and thin film transistor array panels including the same and methods for manufacturing the same.
(b) Description of the Related Art
Generally, wiring of semiconductor devices is to transmit signals without delay.
In order to prevent delay or distortion of signals, materials having low resistivity such as aluminum or aluminum alloy are generally used. However, since the physical and the chemical properties of the aluminum or aluminum alloy is not good, that is, the aluminum or aluminum alloy is easily oxidized and corroded, when connecting other conductive material in a contact portions, accordingly the characteristics of semiconductor devices are deteriorated. To improve a contact properties of the wire made of aluminum and aluminum alloy, a different material is then inserted. However, to form the wire of multi-layered structure, several etchant to pattern the wire of multi-layered structure are needed, also many photolithography steps are needed. Accordingly, the manufacturing method is complicated and production costs are increased.
On the other hand, a liquid crystal display (LCD) is one of the most popular flat panel displays (FPDS). The liquid crystal has two panels having electrodes for generating electric fields and a liquid crystal layer interposed therebetween. The transmittance of incident light is controlled by the intensity of the electric field applied to the liquid crystal layer.
In the most widely used liquid crystal display, the field-generating electrodes are provided at both the panels, and one of the panels has switching elements such as thin film transistors.
In order to prevent delay or distortion of signals, materials having low resistivity such as aluminum or aluminum alloy are also used in the liquid crystal display. However, in the case that ITO (indium tin oxide) as a transparent electrode is used as a pixel electrode or to reinforce pad portions, because of the poor contact properties between aluminum or aluminum alloy and indium tin oxide (ITO), a different material is then inserted therebetween and the aluminum or aluminum alloy must be removed in the pad portions to prevent the corrosion of aluminum and aluminum alloy. Accordingly, the manufacturing method is complicated.
On the other hand, a thin film transistor array panel is manufactured by a photolithography process. Since the photolithography process is expensive, the number of the photolithography steps needs to be minimized.
It is therefore an object of the present invention to provide contact structures having good contact properties of wiring made a material of low resistivity and methods for manufacturing the same.
It is another object of the present invention to provide a thin film transistor array panels having contact structures of good contact properties and methods for manufacturing the same.
It is another object of the present invention to simplify manufacturing methods of thin film transistor array panels for liquid crystal displays.
These and other objects are provided, according to the present invention, by forming an inter-layer reaction layer on a wire through annealing process.
In a contact structure of a wire and a method for manufacturing the same according to the present invention, a wire made of a metal is formed on a substrate, and an inter-layer reaction layer is formed on the wire. Next, a conductive layer, which is electrically connected to the wire via the inter-layer reaction layer, is formed.
It is desirable that the wire is made of aluminum-based material, and the inter-layer reaction layer may include silicon or transition metal. Here, an insulating layer having a contact hole may be added between the wire and the conductive layer, the insulating layer may formed before forming the inter-layer reaction or after forming the inter-layer reaction.
The inter-layer reaction layer is formed through annealing process as thermal treatment, and annealing process is executed in the range of 200-400xc2x0 C.
The conductive layer may be formed of a transparent conductive material, which does not generate battery reaction when contacting with the metal of aluminum-based material, such as indium zinc oxide.
To form the inter-layer reaction layer, the buffer layer of a transition metal, or an amorphous silicon or doped amorphous silicon is deposited, and annealed. The buffer layer may be removed, or not, and patterned.
The contact structure of the wire and the method for manufacturing the same may be adapted to a manufacturing method of a thin film transistor array panel.
First, a gate wire, a data wire and a semiconductor layer are formed, and an insulating layer covering them is formed. Then, an inter-layer reaction layer including at least silicon or transition metal is formed on the gate wire and the data wire. The insulating layer is patterned to form a contact hole exposing the gate wire and/or the data wire. Next, a transparent conductive layer electrically connected to the gate wire and/or the data wire via the inter-layer reaction layer is formed.
It is desirable that the gate wire and/or the data wire include a conductive material of aluminum-based metal and the conductive layer is made of indium zinc oxide.
More concretely, a conductive layer is deposited and patterned on an insulating substrate to form a gate wire including a gate line and a gate electrode connected to the gate line, and a gate insulating layer is deposited. A semiconductor layer is formed, and a conductive layer is deposited thereon and patterned to form a data wire including a data line intersecting the gate line, a source electrode connected to the data line and adjacent to the gate electrode and a drain electrode opposite of the source electrode with respect to the gate electrode. Next, a passivation layer is deposited and patterned to form a first contact hole exposing the drain electrode. Then, a pixel electrode electrically connected to the drain electrode through the first contact hole is formed on the passivation layer. At this time, inter-layer reaction layer is formed on the gate wire and/or the data wire.
Here, it is desirable that the inter-layer reaction layer is formed through thermal treatment using annealing step, the gate wire and the data wire include aluminum-based material, the pixel electrode is made of a transparent conductive material such indium zinc oxide.
The gate wire further comprises a gate pad connected to the gate line, and the data wire further comprises a data pad connected to the data line, and the passivation layer has a second and a third contact hole along with the gate insulating layer respectively exposing the gate pad and the data pad. A redundant data pad and a redundant gate pad, which are respectively and electrically connected to the gate pad and the data pad through a second and a third contact holes of the passivation layer, may be formed when forming the pixel electrode. At this time, the inter-layer reaction layer is extended on the gate pad and/or the data pad.
Here, the step of executing a wet cleaning process using etchant or a dry cleaning process using plasma may be executed before forming the inter-layer reaction layer.
The data wire and the semiconductor layer are together formed by photolithography process using a photoresist pattern having different thicknesses depending the positions. The photoresist pattern may have a first portion having a first thickness, a second portion having a second thickness larger than the first portion, and a third portion having a third thickness smaller than the first thickness and except for the first and the second portions.
A mask used for forming the photoresist pattern may have a first, a second, and a third part, a transmittance of the third part is higher than the first and the second parts, a transmittance of the first part is higher than the second part. The first and the second portion of the photoresist pattern may be respectively aligned on portion between the source electrode and the drain electrode, and the data wire.
It is desirable that the first part of the mask includes a partially transparent layer, or a slit pattern smaller than the resolution of the exposure used in the exposing step, to regulate the transmittance of the first part, and the thickness of the first portion is less than the half of the thickness of the second portion.
An ohmic contact layer may be formed between the data wire and the semiconductor layer, and the data wire, the ohmic contact layer, and the semiconductor layer may be formed in the same photolithography process.